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When choosing the right USRP device for your application, a good place to start is by asking yourself a few questions related to signal parameters, size, weight, power, cost (SWaP-C), performance, and environmental application requirements. Question one: What center frequency and bandwidth do I require?

This question is easy enough to answer, but the next one is more involved: How do I plan to move signal data on or off the device?

This brings into focus the importance of data interfaces. For example, the USRP-290x models are connected to the host through USB and are limited by the maximum sustained bandwidth of that interface, whereas the Ettus USRP X440 is equipped with two 100 GbE interfaces capable of moving much more data.

To learn more about USRP interface bandwidth considerations, read about USRP Bandwidths and Sampling Rates on the Ettus Research knowledge base.

Most USRP devices have a maximum frequency up to 6 GHz and some higher; however, the NI Ettus USRP X410 can operate in the 7 GHz band. On the lower frequency end, some radios go down to 75 MHz and some as low as DC depending on the analog chipset used. See Figure 16 for a breakdown of each model.

Figure 3: The Ettus USRP X410, built on an RFSoC, is a high-frequency wideband SDR with a center frequency up to 7.2 GHz

Cost and Performance Trade-offs

There are trade-offs to consider when choosing a USRP device, specifically cost versus performance. If you require a radio at a great value and you do not have advanced FPGA or wide bandwidth requirements, the NI USRP 290x or Ettus Research B200mini are great options. If you need the widest bandwidth and frequencies up to 7.2 GHz, the NI Ettus USRP X410 may be the best fit. There are many options available in between these two examples. Figure 15 below gives a full break down across all models.

Figure 4: USRP and USRP B200mini Low SWaP-C SDRs

If you need frequencies up to 7.2 GHz, the NI Ettus USRP X410 may be the best fit. If you require the widest possible instantaneous bandwidth, the NI Ettus USRP X440 may meet the need. There are many options available beyond these examples; Figure 16 provides a full breakdown across all models.

Figure 5: The Ettus USRP X440 offers up to 1.6 GHz bandwidth per channel, with a direct sampling transceiver architecture

Stand-Alone or Host-Connected SDR Options

The USRP was conceived as a computer peripheral to connect software to the electromagnetic spectrum. Applications have evolved since the first USRPs, and many require an embedded processor onboard. You may require this stand-alone configuration if your application has the SDR physically distributed from a centralized control system or deployed on its own. If stand-alone is a key requirement, you will need to decide if a Xilinx Zynq™ Multiprocessor System on Chip (MPSoC) or RF System On Chip (RFSoC) is sufficient or if you require a powerful Intel X86 processor onboard. Table 1 provides a breakdown of various models and their onboard processors; consult USRP specification documents for more details.

Radio ModelOnboard ProcessorUSRP N320, USRP N321, USRP N310Xilinx Zynq MPSOCUSRP E31XXilinx Zynq MPSOCUSRP E320Xilinx Zynq MPSOCNI Ettus USRP X410, USRP X440Xilinx Zynq Ultrascale+ RFSOC ZU28DRUSRP Intel Core i7 EQ (2 GHz Quad Core) 

Table 1: Stand-Alone Capable USRP Models with Onboard Processors

Figure 6: USRP Stand-Alone SDR with Built-in Intel Core i7

Ruggedization and Harsh Environments

Although many USRPs are used in the lab, some applications require operation in outdoors or in harsher environments. If your application requires extended operating temperatures or can’t rely on air-cooling, you may want to consider the Ettus Research branded Embedded Series for your application. Additionally, under the Ettus Research brand, there are options to configure the USRP B205mini for extended temperature range with the use of the industrial grade aluminum enclosure assembly for low SWaP operation. Alternatively, if you have extreme environmental requirements, we would love to connect you with our experienced ruggedization partners; contact us to explore these options.

Figure 7: Embedded Series, USRP E320

Multichannel Synchronization

Many applications require multiple input and multiple output (MIMO) configurations with varying levels of synchronization. Some MIMO systems simply require a shared clock for ADCs and DACs, while others require every channel to be locked to a common clock and local oscillator for a full phase coherent operation.

A common MIMO application is for communications with spatial multiplexing. As this only requires clock synchronization, most USRPs with an external 10 MHz reference clock will be sufficient. An example of such a system was built by The University of Bristol and Lund University when they broke the wireless spectral efficiency world record using an SDR-based massive MIMO system. The system used in this application is composed of NI USRP Software Defined Radio Devices with onboard FPGAs.

Figure 8: USRP N320 and N321 with Built-In LO Distribution Interfaces

When a full phase coherent operation is required, you have a few options to consider. If you require up to four channels of receive only operation, the Ettus Research USRP X310 with two TwinRx daughterboards can be set up to share the LO and operate in a phase coherent manner. If more than four channels are required, then consider the Ettus Research USRP N320 and N321 (shown in Figure 8) or the NI Ettus USRP X440. Since the USRP X440 is built with a direct-sampling intermediate frequency (IF) architecture, synchronization can be achieved by sharing sample clocks across up to eight transmit and eight receive channels. It is prepared for multidevice synchronization to an externally provided reference clock signal.

The USRP N321 comes equipped with built-in LO distribution hardware allowing for up to 128 x 128 phase coherent operation: a 32 x 32 configuration example is shown in Figure 9.

Figure 9: USRP N320 and N321 Multichannel Phase Coherent System

Distributed Multi-Radio Synchronization

In some applications, radios require synchronization but are not co-located. In these instances, a full phase coherent operation is a challenge; however, one can use GPS-based synchronization to get frequency and phase stability with a GPS disciplined oscillator (GPSDO). Many USRP models are equipped with a GPSDO from the factory. To learn more, read “Global Synchronization and Clock Disciplining with NI USRP-293x Software Defined Radio.”

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Figure 10: USRP X310 with Onboard GPS Disciplined Oscillator

Inline Signal Processing and FPGA Considerations

Some applications have processing requirements that are best suited for an onboard FPGA. These applications often have wide signal bandwidths or low/deterministic latency requirements. In these cases, picking a radio with the ability to program the FPGA is important. Many of the USB and lower-cost USRP models, such as the USRP B200mini or the N210, are built with smaller FPGA devices and as such do not have the space to add user code. Many of the higher end radios come equipped with Kintex 7 class devices all the way up to the state-of-the-art Ettus USRP X410 and X440 with the Xilinx Zynq UltraScale+ RFSoC. Devices built on Xilinx Zynq include additional cores such as onboard soft-decision forward error correction (SD-FEC), multi-Arm processors, and built-in ADCs and DACs.

USRP ModelOnboard FPGAUSRP N320, USRP N321, USRP N310Xilinx Zynq MPSOCUSRP E31XXilinx Zynq MPSOCUSRP E320Xilinx Zynq MPSOCEttus USRP X410, USRP X440Xilinx Zynq Ultrascale+ RFSOC ZU28DRUSRP , USRP X310Xilinx Kintex 7 410T

Table 2: Comparison of FPGA Enabled USRPs

Figure 11: Comparison of FPGA Resources across NI FPGA Products

​Programmability is the key feature of an SDR, enabling one to take a radio peripheral and turn it into an advanced wireless system. The USRP is the most open and versatile SDR on the market, helping engineers to build systems with a wide variety of software development tools on both the host and on the FPGA.

Host Programming Considerations

As shown in Figure 2 above, there are a variety of options to program the host of an SDR-based system.

Programming on LabVIEW with NI-USRP Driver

LabVIEW is a graphical dataflow programming environment well-suited for designing and implementing communications algorithms. At the most fundamental level, LabVIEW uses the NI-USRP driver to both specify USRP hardware configuration and send and receive properly formatted baseband I/Q data ready for host-side signal processing.

​If LabVIEW is your preferred development environment, it should be noted that although it does have some Linux-based OS support, it’s predominantly a Microsoft Windows-based tool. Additionally, some Ettus Research branded USRP models and configurations may not be supported; see Figure 16.

Figure 12: LabVIEW Block Diagram with the NI-USRP Driver API

Programming with Open-Source Workflows: USRP Hardware Driver (UHD) and GNU Radio

Many SDR users prefer to program USRP hardware with text-based and open-source tool flows built on C/C++ and Python. All NI and Ettus Research USRP models support the USRP hardware driver (UHD), allowing for easy integration to open-source community developed tools such as GNU Radio.

GNU Radio is an open-source tool built solely for SDR developers. While the USRP is not the only radio supported with GNU Radio, it’s the most popular and tested. To learn more about GNU Radio, visit gnuradio.org, and to see all the existing community shared IP for GNU Radio, visit cgran.org.

Figure 13: GNU Radio Companion Flow Graph

Programming with MATLAB

If MATLAB is your preferred tool for programming, several USRP models are supported with the MathWorks Communications Toolbox™. Supported models include, B200, B200mini, X300, N200, and N300 Series. In addition, engineers can directly embed MATLAB code into LabVIEW using the MATLAB script node.

MathWorks also offers Wireless Testbench, a tool that provides capabilities including intelligent signal capture and hardware-based resampling, leveraging the FPGA on the USRP software defined radio device. It allows users to specify waveform-specific characteristics to trigger signal capture and analyze the data of interest. 

FPGA Programming Considerations

Many USRPs come equipped with a large FPGA with sufficient free capacity to allow users to embed inline signal processing specific to their application. As described in the hardware section, some USRPs come equipped with Xilinx Zynq SoC devices and some with traditional fabric FPGAs such as the Kintex 7. There are two ways to gain access to the FPGA on USRPs: LabVIEW FPGA and the RF Network on Chip (RFNoC) framework.

Unlike many FPGA development boards or COTS FPGA boards, USRPs are built on a common FPGA framework and provide a higher-level abstraction. This removes some of the complexity encountered when building an FPGA-based system from a bare-bones FPGA board support package.

LabVIEW FPGA

LabVIEW FPGA is an add-on extension for LabVIEW allowing for graphical programming of the FPGA on NI USRP RIO devices. Although one must be familiar with FPGA concepts such as fixed-point math and clocked logic, LabVIEW abstracts hardware and data interfaces and simplifies register configuration and data movement. An advantage of LabVIEW FPGA is the ability to program both the host and FPGA with a unified development tool chain.

Do you have legacy IP you’d like to leverage? LabVIEW FPGA can import external VHDL or Verilog through Component Level IP (CLIP) nodes, allowing for non-LabVIEW IP to be imported. Additionally, LabVIEW allows for Xilinx Vivado project export for expert users working within the Vivado tool directly.

​If LabVIEW FPGA is your tool of choice for host programming, note that it is limited to Windows-based operating systems. Many Ettus Research devices such as the USRP N300 and USRP E300 series are not supported under LabVIEW or LabVIEW FPGA. See Figure 16 for a complete list.

Figure 14: Simple LabVIEW FPGA Block Diagram

RF Network on Chip (RFNoC) Framework

For open-source USRP users, the preferred way to program the FPGA is through the RFNoC Framework. RFNoC, like LabVIEW FPGA, is a data interface and command abstraction framework to simplify adding IP to your USRP without having to rebuild the entire FPGA board support package from scratch. As the name suggests, data flows through the FPGA from the radio as a compressed header network package. At the heart of the RFNoC framework is a crossbar interface allowing the user to simply plug new IP into the crossbar and route data to other IP blocks or to and from the host machine. This network crossbar design removes the complexity of passing data and commands to and from the host.

If working in Vivado and using RFNoC is your preferred path to program the FPGA of your USRP, consider the USRP X300 series, USRP E300 series, USRP N300, and the Ettus USRP X410 or X440 for your application. Learn more about how you can use RFNoC, UHD, and USRP N300 devices to prototype multichannel wireless communication systems. 

Figure 15: RFNoC Conceptual Block Diagram Integrated with GNU Radio

Figure 16: NI and Ettus Research USRP Models Matrix

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